1. Field of the Invention
The present invention relates to a voltage regulator, and more particularly to on-chip active decoupling capacitors for regulating voltage of an integrated circuit to suppress power noise.
2. Description of the Prior Art
Three-dimensional (3D) integration technology can provide enormous advantages in achieving multi-functional integration, improving system speed and reducing power consumption for future generations of integrated circuits. However, stacking multiple dies would face a severe problem of the power integrity. In 3D integration, the increasing supply current through both package and through-silicon-via (TSV) would lead to a large simultaneous switching noise potentially. Moreover, the supply impedance response is dominated by both the packages and TSVs.
To suppress the power noise, decoupling capacitors (DECAPs) are widely used. DECAPs perform as a local reservoir of charge, which is released when the current load varies. But the usage of the on-chip passive DECAPs is limited by two major constraints, including a great amount of gate tunneling leakage and large area occupation. Nowadays, current suppression techniques have been proposed to reduce power supply noise, and the resonant supply noise is suppressed via the delay-line-based and OP-based detection circuits with switched DECAPs, respectively. However, the efficiency of these noise suppression techniques would be reduced significantly by the leakage current in nano-scale technologies.